Secondary protection for ADC.
Hello everyone, I have an ADC connected to an output PAD, and I'm facing a challenge regarding its input resistance. The ADC specification states that it cannot accommodate any input resistance greater...
View ArticleHow to address the DRC error highlighted below
Hi everyone could you help how to clean the DRC error "Check OD.R.1 Error" in cadence virtusuo layout?
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LVS not clear while adding digital std cells into analog layout
Hello every one. I'm using SMIC0.13um CMOS tech, and its evry kind of std digital cell doesn't connect to power directly. In other words, the well net is isolated within the cell. for example, here is...
View ArticleCadence virtuoso bindkey for specific instance
Hello I want to load the specitic instance with bindkey in schematic. I expect that when I press the '1', then 'inv' instance is loaded. How can I customize the bindkey? Thanks
View ArticleFinding Rdson for Mosfet (CMOS) in 22nm
Hello, I need to size LDPMOS and LDNMOS in 22nm technology for switching circuit. Now How can I find the RDSon in cadence virtuoso for the MOSFETs? DC operating point is not giving me any value for it....
View ArticlePDK Information concerning the tolerable heat dissipation per area
I want to design an integrated H-Bridge circuit to drive a load with 100 mA at maximum. To do so, i think that i need to determine the maximum allowed power loss per area to calculate the minimum...
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UMC 0.18um erc error
HI, everyone I'm using an RNPPO_MM resistor in my circuit. This resistor has three terminals. I've connected the bulk to VDD. In the layout, I folded the resistor and I've used an N_TAP guard ring to...
View ArticleMatlab files for Data Converters by Franco Maloberti
Hi everyone, I am looking for the matlab files associated with the exercises from the book Data Converters by Franco Maloberi. I know they were posted here http://ims.unipv.it/ but currently the site...
View ArticleHow to determine if noise/voltage spike is too high for MCU?
Hi, I'm getting a voltage spike from a power supply and I'm measuring it directly at the microcontroller (MCU). I know that it exceeds the absolute maximum rating but it is extremely bief. You can see...
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IC chip 4572 202
I'm wondering what role 4572202 and 4572606 play. (I can't find it even though I search it)
View ArticleDevice Ro (1/gds) Change from Schematic to Extracted Post-layout
Hi, for those with experince, can you please help me understand the reason for device output resistance (ro) change from scheamtic to post-layout? It's for a 7nm technology. I checked the current and...
View Articlelinking S-param to ringing of pulse PDN to QPA2575 amplifier
Hello , I am trying to link S-param to ringing of pulse PDN to QPA2575 amplfier. To simulate the effect of decoupling capacitors of a basic trace via system connected to IC where i have a 0 to 6V pulse...
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fitting time domain pulse to impedance profile of a power delivery network
Hello , i have a general model of a power delivery network from my DC connector to the IC port shown below. then i added a load and put a 0 to 6 Volt pulse.As you can see below i get 280mV at most...
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Time-domain modeling of all digital PLL
hello, I am trying to write a matlab code in time domain for ADPLL, but my ADPLL never locks. I have been searching all over the internet to find an example how to simulate an ADPLL, with no luck, has...
View ArticleMeaning of Sub-180nm or sub-90nm ?
What is the meaning of sub-180nm process technology or sub-90nm process technology?
View ArticleWhat is MOS transistor schematic for Isolation cell?
For the purpose of digital low power design, foundry provide some standard cell called isolation cell. I read there are quite a few different types like dual rail and single rail. Is it possible...
View ArticleStandard Verification Rule Format (SVRF) Manual request
Does anyone have a copy of Standard Verification Rule Format (SVRF) Manual of Mentor Graphics Calibre Verification Toolset? I need it to learn SVRF for an extraction/runset interview in VLSI ASIC...
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Question about drawing an spiral inductor via Skill
Hello, I have been trying with chat gpt helps to draw an octagonal spiral inductor, I have successfully draw N =1 spiral inductor, but I want to expand it to 2,3 & 4 spirals. Below is my code in...
View ArticleProblem about how to choose the voltage level of output device when designing...
Hi everyone, I'm studying design a moto driver circuit. I feel confused about how to choose the devices. If the bus voltage = 40V, and the Vbs = 15V. Is the 16V nldmos/pldmos（BV=18V@MIN，25@TYP）enough...
View Articlehow to check soldering of complex components on board
Hello, i need to solder an opamp component on the footprint shown below. The problem is thatin real life i put component on the footprint and each leg i cover with blancket of solder. It looks steady...
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